Section: Scientific Foundations

A declarative design language

Signal  [34] , [48] , [49] , [41] is a declarative design language expressed within the polychronous model of computation. In Signal, a process $P$ is an infinite loop that consists of the synchronous composition $P|Q$ of simultaneous equations $x:=yfz$ over signals named $x,y,z$. The restriction of a signal name $x$ to a process $P$ is noted $P/x$.

Equations $x:=yfz$ in Signal more generally denote processes that define timing relations between input and output signals. There are four primitive combinators in Signal:

• delay $x:=y\$\mathrm{𝚒𝚗𝚒𝚝}v$, initially defines the signal $x$ by the value $v$ and then by the previous value of the signal $y$. The signal $y$ and its delayed copy $x=y\$\mathrm{𝚒𝚗𝚒𝚝}v$ are synchronous: they share the same set of tags $t_1,t_2,\cdots$. Initially, at $t_1$, the signal $x$ takes the declared value $v$ and then, at tag $t_n$, the value of $y$ at tag $t_{n-1}$.

  $\begin{array}{ccccc}\hfill y& {•}^{t_1,v_1}\hfill & {•}^{t_2,v_2}\hfill & {•}^{t_3,v_3}\hfill & \cdots \hfill \\ \hfill y\$\mathrm{𝚒𝚗𝚒𝚝}v& {•}^{t_1,v}\hfill & {•}^{t_2,v_1}\hfill & {•}^{t_3,v_2}\hfill & \cdots \hfill \end{array}$

• sampling $x:=y\mathrm{𝚠𝚑𝚎𝚗}z$, defines $x$ by $y$ when $z$ is true (and both $y$ and $z$ are present); $x$ is present with the value $v_2$ at $t_2$ only if $y$ is present with $v_2$ at $t_2$ and if $z$ is present at $t_2$ with the value true. When this is the case, one needs to schedule the calculation of $y$ and $z$ before $x$, as depicted by $y_{t_2}\to x_{t_2}\leftarrow z_{t_2}$.

• merge $x:=y\mathrm{𝚍𝚎𝚏𝚊𝚞𝚕𝚝}z$, defines $x$ by $y$ when $y$ is present and by $z$ otherwise. If $y$ is absent and $z$ present with $v_1$ at $t_1$ then $x$ holds $(t_1,v_1)$. If $y$ is present (at $t_2$ or $t_3$) then $x$ holds its value whether $z$ is present (at $t_2$) or not (at $t_3$).

  $\begin{array}{ccccc}\hfill y& & •\hfill & {•}^{t_2,v_2}\hfill & \cdots \hfill \\ & & & \downarrow \hfill \\ \hfill y\mathrm{𝚠𝚑𝚎𝚗}z& & & {•}^{t_2,v_2}\hfill & \cdots \hfill \\ & & & \uparrow \hfill \\ \hfill z& •\hfill & {•}^{t_1,0}\hfill & {•}^{t_2,1}\hfill & \cdots \hfill \end{array}\begin{array}{ccccc}\hfill y& & {•}^{t_2,v_2}\hfill & {•}^{t_3,v_3}\hfill & \cdots \hfill \\ & & \downarrow \hfill & \downarrow \hfill \\ \hfill y\mathrm{𝚍𝚎𝚏𝚊𝚞𝚕𝚝}z& {•}^{t_1,v_1}\hfill & {•}^{t_2,v_2}\hfill & {•}^{t_3,v_3}\hfill & \cdots \hfill \\ & \uparrow \hfill \\ \hfill z& {•}^{t_1,v_1}\hfill & & •\hfill & \cdots \hfill \end{array}$

The structuring element of a Signal specification is a process. A process accepts input signals originating from possibly different clock domains to produce output signals when needed. This allows, for instance, to specify a counter where the inputs tick and reset and the output value have independent clocks. The body of counter consists of one equation that defines the output signal value . Upon the event reset , it sets the count to 0. Otherwise, upon a tick event, it increments the count by referring to the previous value of value and adding 1 to it. Otherwise, if the count is solicited in the context of the counter process (meaning that its clock is active), the counter just returns the previous count without having to obtain a value from the tick and reset signals.

    process counter = (? event tick, reset; ! integer value;)

        (| value := (0 when reset)

            default ((value$ init 0 + 1) when tick)

            default (value$ init 0)

        |);

A Signal process is a structuring element akin to a hierarchical block diagram. A process may structurally contain sub-processes. A process is a generic structuring element that can be specialized to the timing context of its call. For instance, the definition of a synchronized counter starting from the previous specification consists of its refinement with synchronization. The input tick and reset clocks expected by the process counter are sampled from the boolean input signals tick and reset by using the when tick and when reset †expressions. The count is then synchronized to the inputs by the equation reset ^= tick ^= value .

    process synccounter = (? boolean tick, reset; ! integer value;)

        (| value := counter (when tick, when reset)

         | reset ^= tick ^= value

         |);